SiC device start-up powers ahead in Coventry
Coventry-based start-up Anvil Semiconductors is developing power diodes, power mosfets and perhaps LEDs using a novel silicon carbide (SiC) process technology.
The company’s technique is to deposit SiC with a “3C” crystal structure on a silicon wafer, in effect SiC-on-silicon.
Transistors made from SiC and gallium nitride (GaN) are being proposed as alternatives to silicon in power applications because they can switch much faster, increasing efficiency and allowing magnetics to be shrunk, and have inherently better voltage capabilities.
However, getting semiconductor-ready SiC and GaN, where few crystal defects are tolerated, continues to be, a headache.
“Some years ago, people tried to make 3C and didn’t succeed. They gave up, and Rohm, Cree and Infineon went for ‘4H’ instead,” Anvil CEO Jill Shaw told Electronics Weekly.
3C SiC has a cubic structure, compared to the 4H hexagonal structure. The bandgaps differ considerably 2.3eV and 3.2eV respectively. 6H SiC also exists, at 3eV.
Unsurprisingly, Shaw is an advocate of 3C SiC.
In transistors, “3C R(on)/mm2 is intrinsically better than 4H, also 3C R(on) does not increase so much with temp,” said Shaw.
In fact, performance does not vary with temperature, but in 4H and GaN it does.
On resistance (R(on))of transistors is a critical parameter, where lower R(on) means better efficiency and less heat.
Familiar silicon power transistors are naturally ‘off’ (‘normally-off’) until turned on, which means a failure in drive circuits results in shut-down.
With naturally-on transistors – simple SiC and GaN JFETs for example – drive failure means uncontrolled output current, and a negative gate voltage is needed to turn them off.
There are normally-off SiC and GaN transistors, but even these tend to need a bipolar gate drive to get the best out of them – they cannot easily be driven by chips designed for silicon power transistors.
Shaw is aiming to produce normally-off SiC mosfets.
“Mosfet from 3C SiC are normally-off – intrinsically,” she said. “We never expect to need a negative gate voltage, Negative drive is a function of poor 4H SiC mosfets, it is one of the physics limitations of 4H.”
Anvil uses CVD (chemical vapour deposition) to create its 3C epitaxy on silicon wafers.
To relieve stresses which would otherwise create dislocations as well as curling the wafer, its surface is divided into squares that will that later correspond to the scribe lines that will separate one transistor from the next.
“We put an oxide grid on the silicon before we put SiC on, and end up with single crystal silicon carbide on the square. Multi-crystal silicon carbide forms on the oxide, which can’t transmit stress,” said Shaw.
The high temperatures necessary for processing 4H SiC are not required in growing 3C. Anvil is making its diodes in a CMOS fab, with the addition of an anneal that is slightly hotter than used for CMOS.